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Conference Spotlight
2025 ANS Winter Conference & Expo
November 9–12, 2025
Washington, DC|Washington Hilton
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The Standards Committee is responsible for the development and maintenance of voluntary consensus standards that address the design, analysis, and operation of components, systems, and facilities related to the application of nuclear science and technology. Find out What’s New, check out the Standards Store, or Get Involved today!
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Latest News
IAEA again raises global nuclear power projections
Noting recent momentum behind nuclear power, the International Atomic Energy Agency has revised up its projections for the expansion of nuclear power, estimating that global nuclear operational capacity will more than double by 2050—reaching 2.6 times the 2024 level—with small modular reactors expected to play a pivotal role in this high-case scenario.
IAEA director general Rafael Mariano Grossi announced the new projections, contained in the annual report Energy, Electricity, and Nuclear Power Estimates for the Period up to 2050 at the 69th IAEA General Conference in Vienna.
In the report’s high-case scenario, nuclear electrical generating capacity is projected to increase to from 377 GW at the end of 2024 to 992 GW by 2050. In a low-case scenario, capacity rises 50 percent, compared with 2024, to 561 GW. SMRs are projected to account for 24 percent of the new capacity added in the high case and for 5 percent in the low case.
Prem N. Mahana, F. N. Trofimenkoff
Nuclear Science and Engineering | Volume 101 | Number 4 | April 1989 | Pages 303-314
Technical Paper | doi.org/10.13182/NSE89-A23620
Articles are hosted by Taylor and Francis Online.
Parallelization of the Porsching algorithm for the numerical integration of hydraulic network conservation equations is described, and a theoretical analysis of the performance of the parallelized algorithm on a MIMD-type parallel computer is given. It is shown that good speedup and efficiency of parallel processing can be achieved by using a quasi-MIMD mode of operation employing (a) a master/slave configuration of processors, (b) message passing for data communication, (c) global synchronization of all processors before data communication, (d) a simple time-shared bus with data broadcast facility as the interconnection network, and (e) distributed communication memories for data communication.
